How to Learn CORDIC: Shift–Add Rotations, Vectoring, Fixed-Point Arithmetic and Hardware Trigonometry

Quick Read. CORDIC computes trigonometric and related functions by replacing general multiplications with a sequence of tiny coordinate rotations whose tangents are powers of two. Those rotations become shifts and additions, which is why CORDIC remains important in fixed-point arithmetic, FPGA designs and resource-constrained signal-processing hardware. The beginner should understand 2D rotation and binary shifts. The intermediate learner should trace rotation and vectoring modes. The advanced learner should understand gain, convergence and quantisation. The professional should reason about word length, guard bits, latency, throughput, pipelining and whether CORDIC is actually the right architecture for the target platform.

One-sentence answer

CORDIC approximates a desired rotation or vector angle as a sequence of signed micro-rotations by arctan(2⁻ⁱ), allowing sine, cosine, atan2, magnitude and related functions to be computed with shifts, additions and a small angle table.

Why this algorithm exists

A general 2D rotation uses multiplications by sine and cosine:

x' = x cos θ - y sin θ
y' = x sin θ + y cos θ

On a modern CPU, hardware floating-point multiplication may be cheap. Historically—and still in many FPGA, ASIC and fixed-point designs—multipliers can consume more area, energy or latency than shifts and adds. CORDIC redesigns the computation around operations that digital hardware performs naturally.

Jack Volder developed the technique for digital navigation computation, and John Walther later generalised the framework to circular, linear and hyperbolic coordinate systems. The algorithm is a useful lesson in co-design: the best mathematical formulation depends on what the machine can do efficiently.

Level 1 — Beginner: turn rotation into shift-and-add

Choose micro-rotation angles αᵢ such that tan αᵢ = 2⁻ⁱ. Then multiplying by tan αᵢ becomes a right shift by i binary places. Instead of rotating by θ in one step, CORDIC repeatedly rotates by ±αᵢ, choosing the sign that reduces the remaining angle.

x[i+1] = x[i] - d[i] * y[i] * 2^-i
y[i+1] = y[i] + d[i] * x[i] * 2^-i
z[i+1] = z[i] - d[i] * atan(2^-i)

Here d[i] is either +1 or −1. In rotation mode, its sign is chosen from the residual angle z[i]. In binary hardware, multiplication by d[i] is just sign selection and multiplication by 2⁻ⁱ is a shift.

The unavoidable gain

Each simplified micro-rotation scales the vector slightly. After many stages, the total magnitude has been multiplied by a predictable CORDIC gain K. For ordinary circular CORDIC, the infinite-iteration gain approaches about 1.64676. If you want a unit-length sine/cosine result, compensate by pre-scaling the initial x-coordinate by 1/K, post-scaling the result, or folding the constant into surrounding computation.

This is a powerful learning moment: removing multipliers from the rotation does not make the mathematics free. The simplification moves complexity into a fixed scale factor, a table of angles and iteration control.

Level 2 — Intermediate: rotation mode

Rotation mode starts with a vector and a target angle. At every stage, choose the direction that drives the residual angle z toward zero. If the initial vector is (1/K, 0), the final coordinates approximate (cos θ, sin θ).

x = 1 / K
y = 0
z = target_angle

for i = 0 .. N-1:
    d = +1 if z >= 0 else -1
    x_new = x - d * (y >> i)
    y_new = y + d * (x >> i)
    z_new = z - d * atan_table[i]
    x, y, z = x_new, y_new, z_new

The notation >> i assumes fixed-point binary arithmetic. In a floating-point teaching implementation, use multiplication by 2⁻ⁱ first so the algorithm is easy to inspect, then migrate to integer fixed point once the recurrence is understood.

Vectoring mode: discover the angle instead

Vectoring mode reverses the goal. Instead of driving the angle accumulator to zero, it rotates the input vector toward the x-axis by choosing d[i] from the sign of y. The accumulated rotation reveals atan2-like phase information, while the final x-coordinate gives a scaled vector magnitude.

• Rotation mode: known angle → rotated vector, sine and cosine.
• Vectoring mode: known vector → angle and magnitude.

Do not memorise two unrelated algorithms. They are the same micro-rotation engine with a different rule for choosing the next direction.

Convergence and range reduction

The elementary arctangent rotations have a finite convergence range. Production implementations therefore perform quadrant or octant mapping before the core iterations and restore the correct signs afterward. This is similar to many numerical algorithms: a small, well-behaved kernel handles a reduced domain, while inexpensive preprocessing maps the full problem into that domain.

When implementing sine and cosine over an entire circle, test values around 0, ±π/2 and ±π carefully. Boundary mapping errors often dominate before the CORDIC recurrence itself is wrong.

Level 3 — Advanced: fixed-point arithmetic

CORDIC becomes professionally interesting when numbers are represented as fixed-point integers. A Q-format allocates some bits to the integer part and the rest to the fractional part. Shifts then implement powers of two exactly, but finite word length introduces truncation or rounding.

• Angle approximation error: only a finite number of micro-rotations are performed.
• Quantisation error: angle-table constants are stored with finite precision.
• Rounding or truncation error: intermediate x and y values are limited to a fixed word length.
• Overflow risk: the CORDIC gain means internal magnitude can exceed the original input range.

Hardware-oriented analyses often add guard bits internally so accumulated quantisation error does not erase the requested output precision. The correct number is an engineering decision tied to iteration count, rounding mode and error budget—not a magic constant copied from a code sample.

How many iterations?

Each circular CORDIC stage contributes roughly one additional bit of angular refinement once the algorithm is in its normal convergence regime. Therefore a common first design uses an iteration count comparable to the required fractional precision. More stages than the numerical format can represent do not necessarily improve the final answer; they may simply accumulate rounding noise and latency.

Hyperbolic and linear CORDIC

Walther’s unified treatment extends the coordinate system so related recurrences can compute hyperbolic functions, exponentials, logarithmic components, multiplication, division and square roots. Hyperbolic CORDIC is not merely circular CORDIC with tanh substituted: some iterations must be repeated to guarantee convergence. That detail is a good boundary between intermediate understanding and advanced implementation.

Professional architecture: iterative or pipelined?

• Iterative architecture: reuse one shift-add stage N times. Small area, higher per-result latency and lower throughput.
• Unrolled pipeline: build one hardware stage per iteration. More area, but after the pipeline fills it can produce a result every clock.
• Partially unrolled: reuse groups of stages to balance area and throughput.
• Angle recoding and higher-radix variants: reduce iteration count at the cost of more complicated selection logic.

The correct architecture depends on the application. A low-rate sensor may prefer one small iterative unit. A communications datapath may value one-result-per-cycle throughput. Modern FPGAs also contain dedicated DSP multipliers, so “CORDIC avoids multipliers” is no longer sufficient justification by itself. Compare area, latency, clock rate, error and energy against table-based or polynomial alternatives on the actual device.

Testing ladder

• Start with θ = 0 and verify cosine ≈ 1, sine ≈ 0.
• Test ±π/4, ±π/2 and values just on either side of quadrant boundaries.
• For rotation mode, verify x²+y² equals the expected scaled magnitude.
• For vectoring mode, compare atan2 and magnitude against a high-precision software reference.
• Sweep thousands of random angles and measure maximum absolute error and units-in-last-place where appropriate.
• Test maximum and minimum representable fixed-point inputs for overflow.
• Compare truncation and rounding-to-nearest policies.
• For hardware, verify cycle-accurate latency, pipeline valid signals and reset behaviour as well as numeric output.

Common misconceptions

• “CORDIC computes exact sine and cosine.” It is an iterative finite-precision approximation.
• “It uses no multiplication at all.” Core stages can be shift-add, but scale compensation and surrounding logic may still use multipliers.
• “More iterations always improve accuracy.” Word length and rounding eventually become the limiting factors.
• “CORDIC is automatically faster than a multiplier-based method.” That depends on the processor, FPGA resources, throughput target and precision.
• “Vectoring mode is a separate idea.” It is the same rotation engine with a different control objective.

A learning route from beginner to professional

• Beginner: derive the 2D rotation equations and understand binary right shifts.
• Intermediate: implement floating-point rotation mode, print every residual angle and compare with standard sine/cosine.
• Advanced: add vectoring mode, range reduction, gain compensation and fixed-point representation.
• Algorithm engineer: build an error harness that sweeps the full input domain and reports worst-case error.
• Professional: choose word lengths from an error budget, evaluate iterative versus pipelined architectures, synthesise on the target device and compare CORDIC against alternative implementations.

For teaching, first let learners predict the sign of the next micro-rotation and the direction in which the residual angle should move. Then run the recurrence, investigate one surprising step, modify the target angle, and only later ask them to build the whole routine. Worked examples with gradually removed lines are especially effective here because the recurrence is repetitive but the purpose of each state variable is easy to confuse.

Authoritative sources and further reading

• J. E. Volder, The CORDIC Trigonometric Computing Technique, IRE Transactions on Electronic Computers, 1959.
• J. E. Volder, The Birth of CORDIC, Journal of VLSI Signal Processing Systems, 2000.
• AMD LogiCORE CORDIC documentation, current device/IP reference.
• M. Lakshmi et al., CORDIC Architectures: A Survey, VLSI Design.
• Fixed-Point Error Analysis of a CORDIC Processor, IEEE.
• Y. Shin et al., The Effects of Worked-Out Example and Metacognitive Scaffolding on Problem-Solving Programming, 2023.

Closing idea. CORDIC is valuable far beyond trigonometry because it demonstrates algorithm–machine fit. By choosing a sequence of operations that aligns with cheap hardware primitives, a difficult numerical task becomes a regular, testable pipeline of small corrections.